VCC Standby
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VCC Standby
so, a 16149396 has always been the heart of my testbench, the 2K of SRAM from 1800-1FFF is largely unused, but i'm curious: is there any reason i can't/shouldn't lift the VCC pin out of the board and run a wire over to the VCC Standby circuit coming off of the power supply IC?
this would give me 2K + 256 bytes of NVRAM the processor has in it(well, NV until the battery +12V is removed). i know actual NVRAM modules in the 4K range like what is used with the MCS NVSRAM module aren't exactly expensive these days, but i'm always looking for ways to use existing stuff before adding in more components.
would i have to worry about bits getting flipped after long periods of being powered? or is this not an issue with SRAM? it doesn't seem to be with the RAM that is internal to the processor.
this would give me 2K + 256 bytes of NVRAM the processor has in it(well, NV until the battery +12V is removed). i know actual NVRAM modules in the 4K range like what is used with the MCS NVSRAM module aren't exactly expensive these days, but i'm always looking for ways to use existing stuff before adding in more components.
would i have to worry about bits getting flipped after long periods of being powered? or is this not an issue with SRAM? it doesn't seem to be with the RAM that is internal to the processor.
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Re: VCC Standby
The VCC standby may not be able to provide enough current to run the SRAM. The difference in power consumption during standby and run is quite a bit (check the data sheet for the values).
You can run the VCC standby and the VCC system voltage each through a diode, then on to the power pin of the RAM chip. Use a low voltage drop schottky device. This will isolate the two power feeds.
Can further isolate the VCC Standby power by placing a resistor in series with it to the diode/chip. This will prevent pulling too much current from the standby feed when the ECM is active. See the data sheet for the standby current, and size the resistor appropriately.
The other part is to be sure that the SRAM stays in standby mode when the ECM is powered down.
Edit: this is wrong, it is actually the opposite, need a pull up resistor from the standby voltage:
May need a weak pull down on the ~CS line, otherwise leakage could pull ~CS high and enable the chip.
RBob.
You can run the VCC standby and the VCC system voltage each through a diode, then on to the power pin of the RAM chip. Use a low voltage drop schottky device. This will isolate the two power feeds.
Can further isolate the VCC Standby power by placing a resistor in series with it to the diode/chip. This will prevent pulling too much current from the standby feed when the ECM is active. See the data sheet for the standby current, and size the resistor appropriately.
The other part is to be sure that the SRAM stays in standby mode when the ECM is powered down.
Edit: this is wrong, it is actually the opposite, need a pull up resistor from the standby voltage:
May need a weak pull down on the ~CS line, otherwise leakage could pull ~CS high and enable the chip.
RBob.
Last edited by RBob; 06-23-2014 at 05:04 PM.
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Re: VCC Standby
was there ever a spec published for what the 34992 could supply to the VCCStandby circuit? i can't find anything on it other than the diagrams Ludis drew up for it. actually, were the SRAMs ever positively identified either? what information is known about them matches...... a lot of SRAMs from the era.
a cheap 5817 diode looks to only drop .1 volts at up to 100mA, which is likely to be more than the SRAM will ever draw. the highest i've seen on datasheets for similar SRAMs was ~80mA. prior to seeing that, i was considering some FETs instead to try and keep voltage drop as low as possible, but these seem to beat a lot of FETs, especially at ~.06 each.
i may lift the VCC pin, solder a wire onto it and see what i can determine about standby mode with my multimeter..... grabbing in-use data may be a bit more interesting, i think i'll have to make up a small program that does nothing but constant reading and writing to the SRAM to load it as much as possible(along with the typical COP stuff and anything else that needs periodic servicing).
i guess i'll have to probe the CS pin as well to see how it's acting. even if it doesn't creep while in standby, the pulldown is still probably not a bad idea. the PROMCS uses a 10K, i imagine that would be fine here as well.
a cheap 5817 diode looks to only drop .1 volts at up to 100mA, which is likely to be more than the SRAM will ever draw. the highest i've seen on datasheets for similar SRAMs was ~80mA. prior to seeing that, i was considering some FETs instead to try and keep voltage drop as low as possible, but these seem to beat a lot of FETs, especially at ~.06 each.
i may lift the VCC pin, solder a wire onto it and see what i can determine about standby mode with my multimeter..... grabbing in-use data may be a bit more interesting, i think i'll have to make up a small program that does nothing but constant reading and writing to the SRAM to load it as much as possible(along with the typical COP stuff and anything else that needs periodic servicing).
i guess i'll have to probe the CS pin as well to see how it's acting. even if it doesn't creep while in standby, the pulldown is still probably not a bad idea. the PROMCS uses a 10K, i imagine that would be fine here as well.
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Re: VCC Standby
Dug through some old data books and found a similar SRAM by Toshiba (they made a lot of memory stuff). It is an 8K x 8 bit device, TC5563APL, in 100, 120 & 150 nsec access.
Operating current runs from 10 to 45 mA.
Standby current is typically 2 uA, with a 100 uA maximum.
As for the ~CS input, need a pull up, not a pull down like I posted previously. This pull up needs to be from the standby voltage, which in the case of this chip can be as low as 2 volts.
Was wondering, what value resistors did GM use on the CS, OE, and WE lines?
RBob.
Operating current runs from 10 to 45 mA.
Standby current is typically 2 uA, with a 100 uA maximum.
As for the ~CS input, need a pull up, not a pull down like I posted previously. This pull up needs to be from the standby voltage, which in the case of this chip can be as low as 2 volts.
Was wondering, what value resistors did GM use on the CS, OE, and WE lines?
RBob.
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Re: VCC Standby
Ack, didn't expect a Delco chip. That doesn't help in finding the specs for the chip. Many of the chips GM used were off the shelf parts with their part number on it.
If you get a chance it is a good idea to measure the resistors. Not all of them are labeled with the actual resistance.
RBob.
If you get a chance it is a good idea to measure the resistors. Not all of them are labeled with the actual resistance.
RBob.
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Re: VCC Standby
meter shows 219, 214 and 221 without removing them from the board, so they look to be legitimate. worst(214) is off by 2.7%.
i won't be so lucky measuring some of the unknown caps on the board.
i won't be so lucky measuring some of the unknown caps on the board.
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Re: VCC Standby
Thanks, that's close enough for government work to be 220 ohms. Just seemed on the high side to me.
I measured the VCC standby voltage at the CPU. I was slightly surprised to see it is 5 volts, and present at both key-on, and key-off. They are likely switching it within the CPU chip so they don't back feed each other.
RBob.
I measured the VCC standby voltage at the CPU. I was slightly surprised to see it is 5 volts, and present at both key-on, and key-off. They are likely switching it within the CPU chip so they don't back feed each other.
RBob.
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Re: VCC Standby
calculation:
assuming the toshiba specs are accurate(i haven't gotten around to lifting the pin and measuring yet), worst-case standby current is 100uA. to get 1 second of time that VCC will stay above the memory clearing theshold, going from 5.0 to 2.0 volts with the equivalent of a 50K impedance requires 22uF. if it were 2uA, then that is 2.5Mohms, which then takes about 50 seconds to reach the same threshold.
since the VCCStandby circuit seems to always be powered, i don't think having a cap between the diode and SRAM would be necessary, but i've been fooled before.
assuming the toshiba specs are accurate(i haven't gotten around to lifting the pin and measuring yet), worst-case standby current is 100uA. to get 1 second of time that VCC will stay above the memory clearing theshold, going from 5.0 to 2.0 volts with the equivalent of a 50K impedance requires 22uF. if it were 2uA, then that is 2.5Mohms, which then takes about 50 seconds to reach the same threshold.
since the VCCStandby circuit seems to always be powered, i don't think having a cap between the diode and SRAM would be necessary, but i've been fooled before.
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