CCR & the IAC Code: ;/////////////////////////////////////////////////////////////////// Or is it for the BCC at the end? -See bold- |
You are correct in that the BEQ will occur if the requested IAC steps are equal to zero. This is set during the Logical Shift Left operation if the requested steps are equal to zero. Edit: Oops. Got that all wrong the first time! |
From whats shown, basically it looks like a really round-about way of checking if the IAC steps have been decayed out. Threw me off the first time because its sort of a strange way of doing it. Although the contents of B are probably used further down, so it probably makes more sense as a whole. |
Oh, the bra if carry clear will happen if the IAC steps in L0111 are less than 128. In this case its proabably used to check for and handle an overflow further down or something. This is set when the LSL occurs. |
The value in L0111 is a request to move the IAC n steps. Bit 7 of L0111 defines the direction to move the IAC: retract or extend. The LSLB is to move b7 out and set/clear the Z flag based on the remaining bits. The BEQ then being ' no IAC movement requested.' RBob. |
Ah, makes more sense now. So the term in L0111 is signed then. |
Originally posted by dimented24x7 Ah, makes more sense now. So the term in L0111 is signed then. RBob. |
-edit code above- I can see why the AXYC code snip is added. AXCN & AUJP don't have it. Looks like a fix for some reported problem to GM. But I can't tell what added benefit the AXCN code listed has for an MT. AXYC(305 MT) has the same code snip too. |
Ok, I took a closer look at it... First time Ive ever looked at the 8D before and I got the wrong impression. My mistake. Thats sort of a wacky way to do it. From what Ive seen so far, in the later PCMs the entire routine is based on airflow to make the proportional, integral, and derivative terms' action linear and at the end a lookup is done to translate the airflow into IAC steps, which are just plain desired and actual steps. The entire algorithm is driven by the RPM error term generated from the current and desired RPM. The desired RPMs are what the computer uses to alter the idle. I was under the impression the whole time that the above was pretty much lifted from the 8D and similar ecms and plunked in the TBI pcms. Evidently from the looks of it this is not the case, and I was making some ASSumptions instead. Since I know nadda about how the 8D stuff works, is it possible to get a description of the idle routine in a nutshell, RBob? Seems like it would probably help Z69's understanding as well, and Im just sort of curious. |
This is from the aujp code hac from the same section as listed in axcn above from LE72E: to LE76C: may need to line them up side by side to see what's going on or not going on.... I still need to update the comments once I'm sure what's going on- In this one of several pages of IAC code. IAC txt file Added for clarity Code: LE6B9: ldaa L0111 ; REQUESTED IAC MOTOR STEPS ; CRef: 0xE6AF LE7C4 in aujp is part of the inject.src and skips all the listed IAC code. Code: LE736: ldab L0111 ; GET REQUESTED IAC MOTOR STEPS ; CRef: 0xE711,0xE71A,0xE71E |
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