DOCUMENT VERSIONS:


Posts will be made here anytime the document is updated:

• Version 5 - December 21, 2013
  • Correctlystated the conversion requirements of the kPa argument that can be used to disablethe Low Octane logic. Previously, the text indicated that no conversion wasrequired.
• Version 4 - July 29, 2013
  • Updated due to broken/changed link to the AUJP hack.
• Version 3 - May 30, 2013
  • Code execution frequency changes and updated code segments with additional comments. See "Corrections" section of the document for details.
• Version 2 - Jan 27, 2013
  • Corrected execution time of code segments of Subroutine LSEG_A
• Version 1 - Jan 19, 2012
  • Corrected Spark Minor Loop Execution time per RBob. See Post #3 below
• Initial Release - Jan 10, 2013

150+ hours and done, hopefully! Would have been faster if better with Assembly language.

The analysis of this subject was started due to a desire to understand why logs were periodically reporting Knock Retard Degrees when Knock Counts were not being reported. That analysis has been completed and resolved, and is posted here: https://www.thirdgen.org/forums/di...-reported.html (Solved-Knock Retard Reported When No Knock Count).

While reviewing that issue, it became obvious there was more than one area of the code that had to be analyzed to fully understand everything to do with Knock Counts and Knock Retard Degrees. Wow! There is a Power Enrich (Forced) Knock Test, Low Octane Spark Retard logic, different types of spark retardation, Knock Counts, minimum degrees of spark retard, decay of spark retard degrees, hundreds of bit-flags to control things, variables that are saved and never used, …. To say that the logic associated with this subject is convoluted and confusing is an understatement! I can’t imagine the difficulty in initially programming it. It causes a severe brain cramp just tracing through it.

Everything documented from this review has been checked many times to ensure accuracy. However, due to the intertwining of so many things, errors are certainly possible! A critical review and comments as to accuracy are welcomed. Changes will be promptly made and posted.

Without the comments in JP’s AUJP hack, it would have been impossible to accomplish this. Thanks JP for those comments, and to any others who may have contributed!!!


Hopefully the attached will add to the AUJP work already done. It includes:

• a summary of the Spark logic flow of the code
• a detailed discussion of each involved code segment as to what it does, etc.
• a time-line showing when each code segment is executed
• flowcharts of the relevant code segments
• results of simulating code segments

PS – The file with flowcharts was way too large to upload here and was disallowed. A link to the version with flowcharts is provided on the first page of the document.

 

Super-Dee-Duper Job on that!
This will certainly help me figure out the Launch Retard function in the V4 code that didn't work right. Still don't know what I did wrong.

Someone has really caught the tuning bug!
Glad to see there are still people willing to figure things out and share.

 

84Elky, I looked it over, didn't study it, one thing I noticed is the spark minor loop timing. It runs at 80 Hz (every 12.5 msec).

RBob.

 

Wow! Nice work!

 

Duplicate post

 

Absolutely correct RBob. Don't know where that came from. It's correctly shown on the Code Execution time-line on page 8 as 12.5 msec (80 times/sec).

Thanks and look forward to any other observations.