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accessing 0x3000 region of hardware in 730

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Old 07-22-2006, 04:02 PM
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accessing 0x3000 region of hardware in 730

I'm loosing my mind here....

Using aldl data read commands, I can read locations 0x3130 and 0x3131 and see the value incrementing while an engine is running. But if I patch in some code in the 160Hz loop (or in segment 2) to copy these values to my nvsram module, I always read back the value 0x30 and 0x31 respectively (using the same aldl data read commands).

Is there some bit somewhere that needs to be set or cleared to make this region of memory accessable outside of the ALDL tx routine??

Thx...

Code:
ARRRRRRRG:
	psha
	ldaa	0x3130
	staa	0x2C01
	ldaa	0x3131
	staa	0x2C02
	pula
	jmp	(address withheld)

Last edited by MonteCarSlow; 07-22-2006 at 04:08 PM.
Old 07-22-2006, 06:52 PM
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Originally Posted by MonteCarSlow
I'm loosing my mind here....

Using aldl data read commands, I can read locations 0x3130 and 0x3131 and see the value incrementing while an engine is running. But if I patch in some code in the 160Hz loop (or in segment 2) to copy these values to my nvsram module, I always read back the value 0x30 and 0x31 respectively (using the same aldl data read commands).

Is there some bit somewhere that needs to be set or cleared to make this region of memory accessable outside of the ALDL tx routine??

Thx...

Code:
ARRRRRRRG:
	psha
	ldaa	0x3130
	staa	0x2C01
	ldaa	0x3131
	staa	0x2C02
	pula
	jmp	(address withheld)
When you read 0x3130 using the ALDL transmit routine, you are really reading and sending location 0x0130. The ALDL routine strips off the MSBs of the address of any transmit request between 0x3000 and 0x6FFF.

If you really read address 0x3130 outside of the ALDL transmit routine, who knows what you are reading... The timer chip may respond, I don't know.

Scot
Old 07-22-2006, 07:20 PM
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Bwaaahhahahaa.....

Thanks Scot.

Everything makes so much more sense now. Me, being more of a h/w guy, assumed these were hardware counters...
Old 07-23-2006, 07:25 AM
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The "3" preceeding the address means that the ALDL value that follows is double byte word.

When a double byte word is set up for transmit in the ALDL tables, a $3xxx or $4xxx must be appended to the address to flag the software to load both bytes of the word simultaneously in order to ensure consistency.

If the word is in the $0-$3FF address range, a "3" is appended. If the word is in the 2K RAM chip ($1800-$1FFF range), a "4" is appended.

Todd
Old 07-24-2006, 10:49 PM
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How did you figure that out?
I've been tripping over that for a few years. The PW in 8D is transmitted that way.
RBob dropped a hint a few months back by I didn't have time for a tangent.
Old 07-26-2006, 02:21 AM
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Originally Posted by MonteCarSlow
Bwaaahhahahaa.....

Thanks Scot.

Everything makes so much more sense now. Me, being more of a h/w guy, assumed these were hardware counters...
Like said above, the ALDL routine has safeguards to prevent unwanted hardware reads. You have to manually alter the code to allow higher reads. Alot of the registers also cant being read sequentially without nothing, or even worse, something bad happening. I found that out the hard way when I tried and tried and tried to read a pulse accumulator through the ALDL. It occured to me on the zillionth try that I had to first read in the 16 bit value and store it to memory before I could spool it out through the ALDL.

Last edited by dimented24x7; 07-26-2006 at 02:24 AM.
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